1. Field of the Invention
The present invention relates to a semiconductor device having a multilayer interconnection structure and a method of fabrication thereof, and more particularly to the semiconductor device having an interlayer insulating film including a silicone ladder series resin film, and the method of fabrication thereof.
2. Description of the Prior Art
Because of higher integrated semiconductor devices such as LSI, their interconnection have been developed to have a multilayer structure as well as a higher density structure. Hence, an upper layer of the multilayer interconnection has a large variation in a step level, a fine wiring pattern formed on the upper layer causes a problem of damaged reliability due to disconnection and so forth.
Therefore, flattening of an interlayer film is an important technique to facilitate the multilayer interconnection, and various methods have been developed as the flattening technique.
Above all, an SOG (spin on glass) coating method is often employed because of an easy process, to coat a surface of a semiconductor substrate having the variation in the step level with liquid insulating material so as to form an interlayer insulating film having a flat surface.
However, in this method, a failure may occur in a wiring made of aluminium (Al) or the like due to, for example, moisture emitted from the material (hereinafter referred to as SOG material) which is used in the SOG coatig method. Thus, long-term reliability may be damaged due to degraded electric characteristics and so forth.
In order to avoid the problem, one method is employed in which the interlayer film has a three-layer structure so as not to directly contact the wiring with a coating film (hereinafter referred to as SOG film) formed by the SOG coating method.
For example, as disclosed in Japanese Patent Publication (Kokai) No. 3-62554, an interlayer insulating film having the three-layer structure is formed to have a structure in which the SOG film is interposed between oxide films formed by plasma vapor phase epitaxy.
A brief description will now be given of a method of fabrication of the interlayer insulating film having the three-layer structure.
As shown in FIG. 5(a), a pattern serving as a first Al wiring layer 3 is initially formed on a semiconductor substrate 1 and an insulating film 2.
Subsequently, as shown in FIG. 5(b), a silicon oxide (SiO.sub.2) film 4 is deposited by a plasma CVD (chemical vapor deposition) method on the first aluminium (hereinafter abbreviated Al) wiring layer 3. Further, a surface of the silicon oxide film 4 is coated by a spin coater with an SOG film 8.
Thereafter, as shown in FIG. 5(c), a silicon oxide film 6, deposited by the plasma CVD method, is formed on a surface of the SOG film 8.
Next, according to an RIE (reactive ion etching) method, a contact hole is provided by etching in the interlayer insulating film having the three-layer structure at a predetermined position.
As shown in FIG. 5(d), a second Al wiring layer 7 is formed by using, for example, a sputtering method to provide patterning for a desired form.
In this case, it is necessary to provide a flat primary coat so as to form the second Al wiring layer 7 with high accuracy.
The SOG film 8 is formed for the flattening to serve as an intermediate layer in the interlayer insulating film having the three-layer structure. When an inorganic SOG material is used to form the thick SOG film 8 by only one coating, there is a problem in that the SOG film 8 is easily cracked due to shrinkage or the like at a time of thermosetting.
Hence, the thermosetting must be performed after applying the inorganic SOG material so as to form a thin film. Further, in order to improve flatness, it is necessary to repeat the coating of the thin SOG film several times so as to form the multilayered SOG film 8.
However, the process inevitably results in the increased number of steps for the flattening. In addition, it is naturally difficult to form a thick film made of the inorganic SOG material by only one coating.
As compared with the above, when organic SOG materials such as silicone resin are employed, a thick film can be easily formed by only one coating, and even a thick film by one coating can offer the advantage of good resistance to crack at the time of thermosetting.
However, though the conventional organic SOG material enables one coating and can provide more improved flatness by the coating than that in the inorganic SOG material as described before, it is impossible to provide sufficient flatness required in the multilayer interconnection structure.
Further, the conventional organic SOG material discharges substantially the same amount of gases such as moisture in the film as that in the inorganic SOG material. When the organic SOG film is employed as a single layer film, the gases such as moisture adversely affect upper and lower semiconductor layers or a metallic layer in the SOG film.
Therefore, as set forth above, the organic SOG material is employed as an interlayer film which is vertically interposed between the inorganic silicon oxide films to form the three-layer structure.
Even in case of the interlayer insulating film having the three-layer structure, the SOG film serving as the intermediate layer is exposed by providing the through-hole for wiring.
This interferes with the wiring such as Al in the through-hole to generate degraded electric characteristics, resulting in a disadvantage for the long-term reliability.
In order to avoid the disadvantage, etch back is typically carried out to remove the remaining SOG film on a flattened wiring pattern of a lower wiring layer so as to expose no organic SOG film in the through-hole which is provided above the wiring pattern of the lower layer.
From this point of view, if silicone ladder series resins are employed as the organic SOG material, it is possible to obtain a sufficiently thick film by the one coating. It is also possible to reduce the amount of discharged gases such as moisture generated by dehydrating condensation because of a small amount of --OH group.
That is, even when the silicone ladder series resins are exposed in the through-hole, no failure occurs in the Al wiring, thereby eliminating restriction on a structure of a semiconductor device and reducing the number of steps.
This type of silicone ladder series resin is disclosed in, for example, Japanese Patent Publication (Kokai) No. 56-49540.
Though the silicone ladder series resin employed in the publication discharges a small amount of gases such as. moisture and can provide excellent reliability of the wiring, the silicone ladder series resin, however, has a poor bond performance between the resin film and adjacent layers so that the resin film may be easily separated from a primary coat or an upper film.
Particularly, resins frequently exhibiting the poor bond performance may include resins having --CH.sub.3 group or --C.sub.2 H.sub.5 group at an end of a molecular chain at which --OH group is absent, and resins having a molecular weight exceeding 100,000 and having an extremely small amount of --OH group.
However, resins having --OH groups in side chains of molecular chains discharge a large amount of gases.
Meanwhile, in the process to form the interlayer insulating film having the three-layer structure in the above multilayer interconnection structure, the inorganic silicon oxide film formed by, for example, the plasma CVD method and the organic SOG film are concurrently etched in the etch back or in the process to form the through-hole.
Hence, it is necessary to reduce a difference in an etching rate between the organic SOG film and the silicon oxide film. The organic SOG film and the silicon oxide film are adjacently formed as interlayer films, and are finally treated as the same layer.
In the etching process thereof, if two types of layers are concurrently etched and two materials have considerably different etching rates, etched surfaces of the two materials do not conform to each other. As a result, it is impossible to provide a desired processed form.
For example, when the lower layer is flattened by the etch back method, it is necessary to provide the same etching rate in upper and lower layers.
In reality, the etching rate of the organic SOG film is generally slower than that of the inorganic SOG film in dry etching.
This is why the organic SOG film contains carbon. That is, in the dry etching for etching inorganic materials, as the etched material has a larger amount of carbon, the etching rate becomes more slowly.
Here, it is possible to provide a higher etching rate of carbon-containing organic SOG film by using an oxygen-containing etching gas in the dry etching.
As described before, if the same etching rate can be set in the dry etching for the silicon oxide film made of the inorganic material and for the organic SOG film made of organic material, the interlayer films in a two-layer structure can be concurrently etched.
Further, a large amount of oxygen must be added to the etching gas in order to etch resins such as silicone ladder series resins containing a large amount of carbon at the same dry etching rate as that of the silicon oxide film containing no carbon.
However, as a larger amount of oxygen is added, it is caused to etch a greater amount of resists used as a mask to form a pattern, resulting in a low selection ratio of the silicone ladder series resins serving as the etching target and the resists serving as the mask.
Consequently, since patterning such as formation of the through-hole is interfered, an amount of added oxygen should be limited.